Xun (Steve) Jian


xunj@vt.edu
Assistant Professor at Virginia Tech CS

About Me: I obtained my PhD in Computer Engineering from University of Illinois at Urbana Champaign in Summer of 2017. My primary research is computer architecture, with special interest in memory architectures, high-performance architectures, energy-efficient architectures, reliable and secure architectures.

HEAP (High-performance, Energy-efficient, Assured Processing) Lab

      PhD Students:
      Masters Students:
      Undergraduate Students:
      Alumni:

Select Publications

In 2018

  • Da Zhang, Vilas Sridharan, and Xun Jian. “Exploring and Optimizing Chipkill-correct for Persistent Memory Based on High-density NVRAMs," in Proceedings of the 51st International Symposium on Microarchitecture (MICRO), October 2018. (PDF)
  • Kate Nguyen, Kehan Lyu, Xianze Meng, Vilas Sridharan, and Xun Jian. “Nonblocking Memory Refresh,” in Proceedings of the 45th International Symposium on Computer Architecture (ISCA), June 2018. (PDF)
  • Prior to 2018

  • Xun Jian, Pavan Hanumolu, and Rakesh Kumar. “Understanding and Optimizing Power Consumption in Memory Networks,” High Performance Computer Architecture (HPCA), 2017.
  • Henry Duwe, Xun Jian, Daniel Petrisko, and Rakesh Kumar. “Transforming Error Patterns to Enable Deeper Voltage Scaling in On-chip Memories,” International Symposium on Computer Architecture (ISCA), 2016.
  • Xun Jian, Vilas Sridharan, and Rakesh Kumar. “Parity Helix: Efficient Protection against Single-Dimensional Faults in Multi-dimensional Memory Systems,” High Performance Computer Architecture (HPCA), 2016.
  • Henry Duwe, Xun Jian, and Rakesh Kumar. “Correction Prediction: Reducing Strong Error Correction Latency for Low Vmin On-chip Caches,” High Performance Computer Architecture (HPCA), 2015.
  • Xun Jian and Rakesh Kumar. “ECC Parity: A Technique for Efficient Memory Error Resilience for Multi-Channel Memory Systems,” The International Conference for High Performance Computing, Networking, Storage and Analysis (SC), 2014.
  • Xun Jian, Henry Duwe, John Sartori, Vilas Sridharan, and Rakesh Kumar. “Low-power, low-storage-overhead Chipkill Correct via Multi-line Error Correction,” The International Conference for High Performance Computing, Networking, Storage and Analysis (SC), 2013.
  • Xun Jian and Rakesh Kumar, “Adaptive Reliability Chipkill Correct,” High Performance Computer Architecture (HPCA), 2013.
  • Teaching

    Services