Wu-chun Feng

Wu-chun Feng (a.k.a. "Wu")

SyNeRGy Laboratory

Dept. of CS
Dept. of ECE
Health Sciences

Other Affiliations
Wireless @ VT

Google Scholar


Torgersen Hall 2050
620 Drillfield Drive (Alumni Mall)
Blacksburg, VA.
24061. [map]
(540) 231-1192
(540) 231-9218
feng [at] cs.vt.edu

Virginia Tech


  • ( 10/31/18 )
    Paper Accepted to HPC Asia 2019
    Sathre, Gardner, and Feng, have their paper — On the Portability of GPU-Accelerated Applications via Automated Source-to-Source Translation — accepted for publication at HPC Asia: International Conference on High Performance Computing in Asia-Pacific Region to be held in Guangzhou, China in January 2019.

  • ( 10/05/18 )
    Papers Accepted to ReConFig 2018
    Three papers — A Composable Workflow for Productive Heterogeneous Computing on FPGAs via Whole-Program Analysis and Transformation by Sathre, Helal, and Feng; Accelerating High-Performance Computing Workloads on FPGAs via OpenCL by Verma, Krommydas, and Feng; and Exploring FPGA-specific Optimizations for Irregular OpenCL Applications by Hassan, Helal, and Feng, in collaboration with Athanas and Hanafy of ECE — have been accepted for publication at the International Conference on Reconfigurable Computing and FPGAs (ReConFig) to be held in Cancun, Mexico on December 3-5, 2018.

  • ( 08/17/18 )
    The 9th Doctoral Degree from the Synergy Lab
    Official congratulations to Dr. Kaixi Hou for receiving his PhD degree for "Exploring Performance Portability for Accelerators via High-level Parallel Patterns." He started his direct Ph.D. degree in 2013 and is the 9th awardee of the Synergy Lab. Best wishes to him on his Software Engineer position at NVIDIA!

  • ( 08/17/18 )
    Best Poster Award at ICPP 2018
    Congratulations to Sarunya (“Kwang”) Pumma for getting her poster, “I/O Bottleneck Investigation in Deep Learning Systems,” selected as the Best Student Poster at the 47th International Conference on Parallel Processing.

  • ( 06/18/18 )
    Posters Accepted to ICPP 2018
    Congratulations to Vignesh Adhinaryanan, Sajal Dash, and Sarunya Pumma for getting their work accepted into the Ph.D. Forum at the 47th International Conference on Parallel Processing to be held August 13-16, 2018. As part of the acceptance to the program, each will be awarded with a conference registration grant, courtesy of NSF.

  • ( 05/21/18 )
    End of Tour Award Winner
    Congratulations to Ahmed Helal for being selected as one of three worldwide winners of the “End of Tour Award” for the spring at AMD!

  • ( 05/14/18 )
    Paper Accepted to ICPP 2018
    Krommydas, Sathre, and Feng, in collaboration with Sasanka of Intel, have their paper — A Framework for Auto-Parallelization and Code Generation: An Integrative Case Study with Legacy FORTRAN Codes — accepted for publication at the 47th International Conference on Parallel Processing to be held in Eugene, OR in August 2018.

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