Enumerations | |
enum | LEVEL_BASE::REG { REG_INVALID_ = 0, REG_GR_BASE = REG_RBASE, REG_GR_BASE = REG_GBASE, REG_EDI = REG_GR_BASE, REG_GDI = REG_EDI, REG_ESI, REG_GSI = REG_ESI, REG_EBP, REG_GBP = REG_EBP, REG_ESP, REG_STACK_PTR = REG_ESP, REG_STACK_PTR = REG_GBASE + 12, REG_EBX, REG_GBX = REG_EBX, REG_EDX, REG_GDX = REG_EDX, REG_ECX, REG_GCX = REG_ECX, REG_EAX, REG_GAX = REG_EAX, REG_GR_LAST = REG_EAX, REG_GR_LAST = REG_GROT_LAST, REG_SEG_BASE, REG_SEG_CS = REG_SEG_BASE, REG_SEG_SS, REG_SEG_DS, REG_SEG_ES, REG_SEG_FS, REG_SEG_GS, REG_SEG_LAST = REG_SEG_GS, REG_EFLAGS, REG_GFLAGS = REG_EFLAGS, REG_EIP, REG_INST_PTR = REG_EIP, REG_INST_PTR, REG_PHYSICAL_CONTEXT_END = REG_INST_PTR, REG_PHYSICAL_CONTEXT_END = REG_SR_LAST, REG_AL, REG_AH, REG_AX, REG_CL, REG_CH, REG_CX, REG_DL, REG_DH, REG_DX, REG_BL, REG_BH, REG_BX, REG_BP, REG_SI, REG_DI, REG_SP, REG_FLAGS, REG_IP, REG_MM_BASE, REG_MM0 = REG_MM_BASE, REG_MM1, REG_MM2, REG_MM3, REG_MM4, REG_MM5, REG_MM6, REG_MM7, REG_MM_LAST = REG_MM7, REG_EMM_BASE, REG_EMM0 = REG_EMM_BASE, REG_EMM1, REG_EMM2, REG_EMM3, REG_EMM4, REG_EMM5, REG_EMM6, REG_EMM7, REG_EMM_LAST = REG_EMM7, REG_MXT, REG_XMM_BASE, REG_XMM0 = REG_XMM_BASE, REG_XMM1, REG_XMM2, REG_XMM3, REG_XMM4, REG_XMM5, REG_XMM6, REG_XMM7, REG_XMM_LAST = REG_XMM7, REG_MXCSR, REG_DR_BASE, REG_DR0 = REG_DR_BASE, REG_DR1, REG_DR2, REG_DR3, REG_DR4, REG_DR5, REG_DR6, REG_DR7, REG_DR_LAST = REG_DR7, REG_CR_BASE, REG_CR0 = REG_CR_BASE, REG_CR1, REG_CR2, REG_CR3, REG_CR4, REG_CR_LAST = REG_CR4, REG_TSSR, REG_LDTR, REG_TR_BASE, REG_TR = REG_TR_BASE, REG_TR3, REG_TR4, REG_TR5, REG_TR6, REG_TR7, REG_TR_LAST = REG_TR7, REG_FPST_BASE, REG_FP_BASE = REG_FPST_BASE, REG_FPCW = REG_FP_BASE, REG_FPSW, REG_FPTAG, REG_FPIP_OFF, REG_FPIP_SEL, REG_FPOPCODE, REG_FPDP_OFF, REG_FPDP_SEL, REG_FP_LAST = REG_FPDP_SEL, REG_ST_BASE, REG_ST0 = REG_ST_BASE, REG_ST1, REG_ST2, REG_ST3, REG_ST4, REG_ST5, REG_ST6, REG_ST7, REG_INST_BASE, REG_INST_BASE, LEVEL_BASE::REG_INST_G0 = REG_INST_BASE, REG_INST_G0 = REG_INST_BASE, LEVEL_BASE::REG_INST_G1, REG_INST_G1, LEVEL_BASE::REG_INST_G2, REG_INST_G2, LEVEL_BASE::REG_INST_G3, REG_INST_G3, LEVEL_BASE::REG_INST_G4, REG_INST_G4, LEVEL_BASE::REG_INST_G5, REG_INST_G5, LEVEL_BASE::REG_INST_G6, REG_INST_G6, LEVEL_BASE::REG_INST_G7, REG_INST_G7, LEVEL_BASE::REG_INST_G8, REG_INST_G8, LEVEL_BASE::REG_INST_G9, REG_INST_G9, REG_LAST, REG_LAST } |
enum | LEVEL_BASE::REGNAME { REGNAME_LAST, REGNAME_LAST } |
Functions | |
BOOL | LEVEL_BASE::REG_is_mm (REG reg) |
BOOL | LEVEL_BASE::REG_is_xmm (REG reg) |
REG | LEVEL_BASE::REG_INVALID () |
BOOL | LEVEL_BASE::REG_valid (REG reg) |
BOOL | LEVEL_BASE::REG_is_Half16 (const REG reg) |
BOOL | LEVEL_BASE::REG_is_Half32 (const REG reg) |
BOOL | LEVEL_BASE::REG_is_Lower8 (const REG reg) |
BOOL | LEVEL_BASE::REG_is_Upper8 (const REG reg) |
BOOL | LEVEL_BASE::REG_is_partialreg (const REG reg) |
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Check if register is Invalid |
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Return TRUE if reg is a lower 16-bit register |
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Return TRUE if reg is a lower 32-bit register |
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Return TRUE if reg is a lower 8-bit register |
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Return TRUE if reg is a partial register |
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Return TRUE if reg is a upper 8-bit register |
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Check if register is Valid |